Hard single-step system memory read and write monitoring method

[0031] In order to make the technical means, creative features, goals and effects achieved by the present invention easy to understand, the present invention will be further described below in conjunction with specific illustrations.

[0032] This example takes IBM's PPC405EP to run the VxWorks operating system as an example to further illustrate the specific implementation process of the present invention's solution. The specific implementation steps are as follows, refer to figure 1 :

[0033] 1. After the initialization of VxWorks, use excVecSet to mount the EXC_OFF_DBG exception handling function, handle observation points and hard single-step exceptions, and use taskSwitchHookAdd to mount the task switching hook function;

[0034] 2. Set the memory interval to be monitored, and set the memory observation point as the memory interval to be monitored through the Dbcr1, Dac1, and Dac2 registers of the CPU. Dbcr1 can select the DA12 mode, and set D1R, D1W according to the acce