Intraserver tag-switched distributed packet processing for network access servers

An access server architecture, and methods for use of the architecture to increase the scalability of and balance processor load for a network access server device, are disclosed. In this architecture, packet forwarding and packet processing are distributed amongst cards serving low-speed access lines (i.e., line cards). Thus, as the number of line cards expands, forwarding resources are expanded in at least rough proportion. The NAS route switch controller and the high-speed ports used to access the network are largely relieved of packet processing tasks for traffic passing through the server. The egress port uses a distribution engine that performs the routing lookup for packets received at the high-speed interface, tags the packets with an adjacency table pointer, and sends them to the appropriate forwarding engine for packet processing. The route switch controller, largely uninvolved in the processing of packets, updates routing information needed by each distribution or forwarding engine.