A slow-moving comparator

[0015] The following will illustrate through typical application examples in conjunction with the accompanying drawings.

[0016] The hysteresis comparator of the present invention includes a current source I1, two input MOS transistors, three load MOS transistors and a hysteresis regulator 11, wherein the hysteresis regulator 11 is used to adjust the threshold of the comparator. When the input MOS tube is an NMOS tube, the load MOS tube is a PMOS tube; when the input MOS tube is a PMOS tube, the load MOS tube is an NMOS tube.

[0017] When the input MOS transistor is an NMOS transistor, the load MOS transistor is a PMOS transistor, and the hysteresis regulator 11 is realized by using a PMOS transistor P6, the specific structure of the circuit is shown in FIG. 2 . The NMOS transistors N1 and N2 in the circuit are completely symmetrical. Width to length ratio of P1, P2, P5 (W / L) P1 , (W / L) P2 , (W / L) P5 Equal, ie (W / L) P1 =(W / L) P2 =(W / L) P5 =A; and the width-to