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Buffer circuit of semiconductor memory apparatus

InactiveUS20100039140A1Decrease and increase voltage levelLogic circuits coupling/interface using field-effect transistorsElectric pulse generatorEngineeringVoltage reference

A buffer circuit of a semiconductor memory apparatus includes a buffering section configured to increase or decrease a voltage level of an output node by comparing a voltage level of an input signal with a voltage level of a reference voltage. A voltage compensation section applies a voltage to the output node in proportion to a variation of the reference voltage when the level of the reference voltage is lower than a target level.

Buffer circuit of semiconductor memory apparatus

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Owner:SK HYNIX INC

1 results about "Target level" patented technology

Buffer circuit of semiconductor memory apparatus

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