Method and apparatus for real-time multithreading

a multi-threading and real-time technology, applied in the field of computer architectures, can solve the problems of inefficiency of conventional single-threaded processors, high time consumption of switching, and inability to meet the requirements of real-time multi-threading, so as to improve the overall efficiency of the system

Inactive Publication Date: 2005-08-25
UNIVERSITY OF DELAWARE +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This patented describes methods and devices used during computer processing (CMP) systems to improve their performance more efficiently than current solutions. It achieves this through separating functions into different parts called modules or components within each part's scope. These techniques help manage these limitations while also working together effectively with newer languages like Java code without compromising its functionality.

Problems solved by technology

The technical problem addressed in this patented text relates to improving the efficiency of executing instructions within a small area called a multiprocessive operation mode where different parts of code cannot communicate without slowdown periods. Current methods involve interrupting all necessary processes until afterward, leading to decreased productivity due to delays caused by waiting times. Therefore, there needs a new solution to overcome these issues.

Method used

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  • Method and apparatus for real-time multithreading

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Embodiment Construction

[0023] The following detailed description of the invention refers to the accompanying drawings. The same reference numbers in different drawings identify the same or similar elements. Also, the following detailed description does not limit the invention. Instead, the scope of the invention is defined by the appended claims and equivalents thereof.

[0024] The present invention is broadly drawn to a method and apparatus for real-time multithreading. More specifically, the present invention is drawn to a computer architecture, hardware modules, and a software method, collectively referred to as “EVISA,” that allow low-overhead multithreading program execution to be performed in such a way as to keep all processors usefully busy and satisfy real-time timing constraints. The architecture can be incorporated into the design of a multithreading instruction processor, or can be used as a separate architectural module in conjunction with pre-existing non-multithreading processors as well as spe

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Abstract

A computer architecture, hardware modules, and a software method, collectively referred to as “EVISA,” are described that allow low-overhead multithreading program execution to be performed in such a way as to keep all processors usefully busy and satisfy real-time timing constraints. The architecture can be incorporated into the design of a multithreading instruction processor, or can be used as a separate architectural module in conjunction with pre-existing non-multithreading processors as well as specialized Intellectual Property (IP) core modules for embedded applications.

Description

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Claims

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Application Information

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Owner UNIVERSITY OF DELAWARE
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