Scan chain is a technique used in design for testing. The objective is to make testing easier by providing a simple way to set and observe every flip-flop in an IC.The basic structure of scan include the following set of signals in order to control and observe the scan mechanism.
This invention belongs to integration circuit computer aided design test technique field, which in detail is a test resource alignment method based on whole scanning chain frame. This invention provides a test structure based on whole scanning chain so as to lower the test cost. Besides, this invention also uses bin-packing algorism to realign the test resources to improve the utility rate of the resources.