Scanning chain construction method based on overall situation

A scan chain and global technology, applied in the field of global scan chain architecture, can solve the problem of reduced fault coverage and achieve the effects of increased fault coverage, higher utilization, and reduced test time

Inactive Publication Date: 2005-04-06
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] 2 Due to the correlation between scan chains, if a long scan chain is simply divided into several sub-scan chains and then broadcast, due to the strong correlation of the sub-scan chains, the fault coverage will be reduced, which will be in A more detailed description is given later

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0046] According to the aforementioned scan chain architecture and corresponding test resource allocation method, use the examples in reference [1] to carry out actual experiments. Its composition is shown in Table 1, and the total length of the scan chain of each module is shown in Table 2. According to Table 2, the modules are arranged in descending order according to the total length of the scan chain, corresponding to 1, 2, ..., N, according to Table 2. The sequence number and allocation of test resources are shown in Table 3.

[0047]

module

combinational circuit

number of inputs

combinational circuit

Number of outputs

sequential circuit

Number of triggers

scan chain

Number

test vector

number of

C6288

32

32

--

--

12

C7552

207

108

--

--

73

S838

36

3

32

1

75

S9234

40 ...

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PUM

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Abstract

This invention belongs to integration circuit computer aided design test technique field, which in detail is a test resource alignment method based on whole scanning chain frame. This invention provides a test structure based on whole scanning chain so as to lower the test cost. Besides, this invention also uses bin-packing algorism to realign the test resources to improve the utility rate of the resources.

Description

technical field [0001] The invention belongs to the technical field of computer-aided design and computer-aided testing of integrated circuits, and in particular relates to a global-based scan chain framework and a corresponding test resource allocation method. Background technique [0002] In the design of integrated circuits, more and more test requirements need to be considered, and design for testability is an inevitable trend for integrated circuits to develop larger and faster. The cost of testing an integrated circuit increases primarily with test time, which includes test generation time and test application time. Since the test of combinational circuits is relatively easy to implement, when designing for testability, the design for testability of sequential circuits is mainly considered. In the design for testability of sequential circuits, the scan chain is currently the most common design method. The test of the sequential circuit can be converted into the test o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 赵长虹陈建王俊宇周晓方周电
Owner FUDAN UNIV
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