4 results about "System failure" patented technology

The invention discloses an intelligent underwater combined navigation fault diagnosis method which comprises the following steps: classifying faults of an underwater combined navigation system into a noise burst type system fault, an information burst type system fault and an information gradual change type system fault; judging whether the burst type system fault happens or not by using an improved residual*2 detection method; if the burst type fault happens, isolating a fault subsystem; calculating an average residual value and a residual absolute sum value, and judging whether the system has the noise burst type system fault or the information burst type system fault according to the calculation result, so as to make a preparation for system reconstruction after the fault of the fault subsystem is eliminated; and calculating an average normalization residual value and an adjacent statistic period residual absolute sum value, and judging whether the gradual change type fault happens or not according to the calculation result. By adopting the method, the defect that a fault detection system judges a fault system as a non-fault system by mistake because of the tracking characteristics of a filter is avoided, and meanwhile, various faults in the underwater combined navigation system can be rapidly and accurately judged.

Persistent Memory, byte-addressable non-volatile memory technologies, offer performance advantages and access similar to Dynamic Random Access Memory while having the persistence of disk. Hardware Transactional Memory support, originally designed for DRAM concurrency control, can corrupt persistent memory transactions due to cache evictions before system failure. Unifying storage and memory on the main-memory bus and accessed directly while using HTM for concurrency control has previously required the additional burden of changes to processors to prevent possible data corruption.

The present invention provides a solution for the durability of transactions to persistent memory while using HTM as a concurrency control mechanism, without any changes to processors or cache-coherency mechanisms. The invention includes a software only method and system that provides durability and ordering of HTM transactions to persistent memory. The invention also discloses a back-end memory controller that supports HTM transactions for durability to persistent memory without up-front processor changes.

The invention discloses a commutation failure starting value setting method and device, belongs to the field of safety and stability analysis and control of an electric power system, and provides the commutation failure starting value setting method and device aiming at the problem that commutation failure prediction control starting value setting of a direct current system is not high in adaptability. According to the method, the severity of the direct-current system fault is determined by detecting the maximum values of zero-sequence voltage and three-phase voltage changed by alpha and beta in the first period after the fault, and the obtained voltage amplitude in the first period after the fault serves as a reference and is multiplied by a certain coefficient to serve as a commutation failure prediction control starting value. Therefore, the commutation failure prediction control starting value can be adaptively set in different fault scenes. Simulation results show that the commutation failure prediction control starting value can be effectively set, and compared with an existing method, the commutation failure suppression effect is improved to a certain extent.