System and method for persisting hardware transactional memory transactions to persistent memory

a hardware transaction and persistent memory technology, applied in the field of system and method for persisting hardware transactional memory transactions to persistent memory, can solve the problems of corrupted pm, high latency, and new main-memory databases (mmdb), and achieve the effect of atomicity and durability of write operations

Active Publication Date: 2021-03-23
GILES ELLIS ROBINSON +1
View PDF6 Cites 9 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This technology allows for efficient use of space on computer systems by utilizing both hardware (cache) organization and logical means such as data movement). Additionally it supports concurrent processing across multiple memories without affecting their performance or reliance upon each other's timing capabilities. Overall this makes writing transactions faster and more reliable than traditional methods like disk storage devices.

Problems solved by technology

In this patented technical solution described in the patents relating to improving the reliance and efficiency of storing data within electronic devices like computers, there exist various ways to improve their capabilities without sacrificing energy consumption. One approach involves implementing certain algorithms called Memo Interval Storing Unstructured Replicated Block RAM (SMUBL/BFARMA). It achieves fast access times through sequential writes instead of conventional ones due to its ability to execute simultaneous tasks over multiple cores. Another option includes performing parallelism between two processors where one core performs calculations before updating content stored locally. Finally, the patented proposals involve adding concurrence controls to prevent invalidations caused by correlated input streams.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • System and method for persisting hardware transactional memory transactions to persistent memory
  • System and method for persisting hardware transactional memory transactions to persistent memory
  • System and method for persisting hardware transactional memory transactions to persistent memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0059]The emerging field of byte-addressable, Non-Volatile Memory (NVM) technology unveils a new area for researchers in both computer architecture and software design. Persistent Memory (PM) is a group of new technologies that include but is not limited to Phase Change Memory (PCM), battery backed DRAM, Magnetoresistive Random Access Memory, Spin-Transfer Torque Random Access Memory, Flash-backed DRAM, Resistive Random Access Memory, and other memristor based technologies. PCM shows promise in that it can achieve a high chip density and speed. These properties will enable the creation of systems with large amounts of persistent, byte-addressable memory that can replace slow, block based Flash or hard disk drives. Utilizing HTM for concurrency control mechanisms is difficult in that HTM transactions will abort if flushing values to a persistent log and, since all values are visible instantly after the HTM section, a subsequent cache eviction and failure, might corrupt an in-memory data

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

Persistent Memory, byte-addressable non-volatile memory technologies, offer performance advantages and access similar to Dynamic Random Access Memory while having the persistence of disk. Hardware Transactional Memory support, originally designed for DRAM concurrency control, can corrupt persistent memory transactions due to cache evictions before system failure. Unifying storage and memory on the main-memory bus and accessed directly while using HTM for concurrency control has previously required the additional burden of changes to processors to prevent possible data corruption.
The present invention provides a solution for the durability of transactions to persistent memory while using HTM as a concurrency control mechanism, without any changes to processors or cache-coherency mechanisms. The invention includes a software only method and system that provides durability and ordering of HTM transactions to persistent memory. The invention also discloses a back-end memory controller that supports HTM transactions for durability to persistent memory without up-front processor changes.

Description

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Owner GILES ELLIS ROBINSON
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products