Test point identification method and device and application

An identification method and test point technology, applied in special data processing applications, instruments, geometric CAD, etc., can solve problems such as consuming the energy of technicians, affecting production efficiency, and missed inspections, reducing testing and improving testing efficiency.

Active Publication Date: 2022-05-27
杭州捷配信息科技有限公司
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This patented technology uses specialized areas on an electronic circuit board called “pops” (small sections) placed at specific locations around it for connecting different parts together. These paddies can help improve the performance of the circuit by providing extra space where certain components may work properly without being overlooked. By counting these lines from multiple connected devices within the same area, we aim to identify any potential issues with them before they become too severe affects their overall functioning negatively impact its quality.

Problems solved by technology

This patented technology describes methods for identifying defects or short circuits at different locations within an electronic component (PC) printed wiring board during its fabrication stage. While manual selection may result in errors due to human factors, automatic detection systems require significant effort from engineers while still requiring excessive power consumption compared with traditional approaches. Additionally, existing analytical techniques frequently identify irrelevant ones which further reduces the effectiveness of automated fault location processes.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Test point identification method and device and application
  • Test point identification method and device and application
  • Test point identification method and device and application

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0033] The embodiments of the present application provide a method for identifying test points, which can accurately identify necessary test points on a printed circuit board, reduce testing of unnecessary test points, and improve the test efficiency of printed circuit boards. Specifically, refer to figure 1 , the method includes:

[0034] Obtaining a PCB basic primitive, wherein the PCB basic primitive includes a network node and a network line segment connecting the network node;

[0035] A network connectivity graph is constructed based on the PCB basic primitives, wherein any two of the PCB basic primitives in each of the network connectivity graphs are connected;

[0036] Select any network node in the network connectivity graph as the execution node, take the execution node as the starting point to travel the network connectivity graph, mark the traveled network node as the traveled node during the travel process, and mark the traveled network segment as the traveled node.

Embodiment 2

[0068] Based on the same idea, refer to Figure 7 , the application also proposes a test point identification device, including:

[0069] A primitive acquiring unit 301 is configured to acquire a PCB basic primitive, wherein the PCB basic primitive includes a network node and a network line segment connecting the network node;

[0070] A network connectivity graph obtaining unit 302, configured to construct a network connectivity graph based on the PCB basic primitives, wherein any two of the PCB basic primitives in each of the network connectivity graphs are connected;

[0071] The tour unit 303 is configured to select any network node in the network connectivity graph as an execution node, and travel the network connectivity graph with the execution node as a starting point, and mark the traveled network node as a traveled node during the travel process, and mark the traveled network node as a traveled node. The traveled network line segment is a traveled line segment, and the

Embodiment 3

[0075] This embodiment also provides an electronic device, refer to Figure 8 , which includes a memory 404 and a processor 402, where a computer program is stored in the memory 404, and the processor 402 is configured to run the computer program to execute the steps in any of the above-mentioned embodiments of the test point identification method.

[0076] Specifically, the above-mentioned processor 402 may include a central processing unit (CPU), or a specific integrated circuit (Application Specific Integrated Circuit, ASIC for short), or may be configured as one or more integrated circuits implementing the embodiments of the present application.

[0077]Among others, memory 404 may include mass storage 404 for data or instructions. By way of example and not limitation, the memory 404 may include a hard disk drive (Hard Disk Drive, abbreviated as HDD), a floppy disk drive, a solid state drive (Solid State Drive, abbreviated as SSD), flash memory, optical disk, magneto-optical

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a test point identification method and device and application, and the method comprises the following steps: obtaining a PCB basic primitive, constructing a network connected graph based on the PCB basic primitive, selecting any network node in the network connected graph as an execution node, and traveling the network connected graph with the execution node as a starting point, the method comprises the following steps: in a tour process, marking a tour network node as a tour node, marking a tour network line segment as a tour line segment, collecting the network line segments communicated with the tour node as a subset of the tour node, counting the number of the network line segments in the subset of the tour node, and if the number of the line segments is 1, sending the tour node to the tour node; and if the network nodes are not tested, the updated nodes are identified as test points, and whether the network nodes are network nodes which must be tested is judged by using the number of the network line segments, so that necessary test points are screened from a plurality of network nodes, the test of unnecessary test points is reduced, and the PCB test efficiency is improved.

Description

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Owner 杭州捷配信息科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products