Circuit measuring operating speed and related semiconductor memory device

[0022]Embodiments of the invention will now be described more fully with reference to the accompanying drawings. The invention may, however, be embodied in different forms and should not be construed as limited to only the illustrated embodiments. Rather, these embodiments are presented as teaching examples. In the drawings, certain geometric relationships may be exaggerated for clarity. Throughout the drawings and written description like reference numbers and legends refer to like or similar elements.

[0023]FIG. 2 is a schematic diagram illustrating a semiconductor memory chip incorporating a measuring circuit according to an embodiment of the invention. The term “chip” is used to denote a wafer level arrangement of circuits functionally enabling at least the read / write operations of the ultimately formed semiconductor memory device. Thus, a semiconductor memory chip is a wafer level fabrication of a wafer portion capable of being testing for operating speed and subsequently removed