Non-volatile memory device and operating method thereof

[0019]Hereinafter, various embodiments of the present disclosure will be described with reference to the accompanying drawings. However, embodiments may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0020]FIG. 1 is a block diagram of a non-volatile memory device according to an embodiment.

[0021]Referring to FIG. 1, a non-volatile memory device 100 may include a memory unit 110, a peripheral circuit unit, a processor 150, a data buffer 160, and an external input / output circuit 170. The memory unit 110 including a cam block and a plurality of memory blocks MB1 to MBN. The peripheral circuit unit may include a register 120, a input / output buffer 130 and a voltage providing unit 140.

[0022]The plurality of memory blocks MB1 to MBN of the memory u