Encryption processing device, encryption processing method, and program

Active Publication Date: 2013-09-26
SONY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0046]The configuration of an embodiment of the present invention enables a reduction in size and lower power consumption of an encryption processing configuration applying a generalized Feistel structure.
[0047]Specifically, an encryption processing configuration applying a generalized Feistel structure in which data is divided and input into multiple lines, and data transformation processing is repeatedly executed applying a round function on the data transferred into each line, wherein during an execution cycle of matrix operation in which a matrix operation executing unit executes a linear tran

Problems solved by technology

Hardware embodiments may be implemented with smaller circuit sizes, which lead to decreased costs and lower power consumption efficiency when implementing a hardware-based design.
However, this implementation method to reduce size is applicable to processing sequences involving AES algorithms using

Method used

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Examples

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Example

[0063]An encryption processing device, an encryption processing method, and a program according to the present invention will be described in detail below with reference to the figures. The description is organized into the following sections.

1. Overview of Share Key Block Ciphers

2. Overview of Method to Reduce Size of AES Encryption Algorithms Applying the SPN Structure

3. Details on Structure and Processing of Matrix Calculating Circuits Regarding Reduced Size SPN Structures

[0064]4. Issues with Applying Reduced Size SPN Structures to Generalized Feistel Structures

5. Structures to Achieve Size Reduction of Generalized Feistel Structures

[0065]6. Advantageous Effects and Other Embodiments of Structures Regarding the Present invention

7. Example Configuration of Encryption Processing Device as an IC Card

1. Overview of Share Key Block Ciphers

[0066]First, an overview of shared key block ciphers that are applicable to the present invention will be described. The shared key block cipher (herea

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Abstract

A reduction in the size of encryption processing configuration applying generalized Feistel structures is achieved. The encryption processing configuration applies a generalized Feistel structure for dividing and inputting data into multiple lines, and repeatedly executing data transformation processing applying a round function on the data transferred to each line, and during the execution cycle of a matrix operation by a matrix operation executing unit for executing linear transformation processing applying a matrix on the data in a first line, an operation is executed on the matrix operation processing data from the initial cycle and data in a second line. This configuration enables a register to be used for both the storage of the data for the second line and the storage of the results of the matrix operation on the first line of data in progress, a reduction in the total number of registers, and thus a reduction in size.

Description

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Claims

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Application Information

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Owner SONY CORP
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