Conversion system for a processor with an expandable instruction set architecture for dynamically configuring execution resources

[0029]The inventors have recognized the inefficiencies associated with processors with fixed execution resources and corresponding limited instructions sets. They have therefore developed a system and method of dynamically configuring the execution resources coupled with an expandable ISA to improve processor operating efficiency. Instead of having to write code using the standard limited instruction set, a software programmer has the option of writing a hardware functional description to perform a specific processing operation. The hardware functional description is converted to programming information by a programming tool or the like, in which the programming information is incorporated into the executable code. During execution, the programming information is used to program a programmable execution unit (PEU) within the processor to perform the same processing operation. The PEU is a hardware accelerator that can perform the processing operation faster and more efficiently than th