Physically unclonable function (PUF) circuits employing multiple puf memories to decouple a puf challenge input from a puf response output for enhanced security

[0046]With reference now to the drawing figures, several exemplary aspects of the present disclosure are described. The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

[0047]Aspects disclosed herein include physically unclonable function (PUF) circuits employing multiple PUF memories to decouple a PUF challenge input from a PUF response output for enhanced security. In this regard, in exemplary aspects disclosed herein, a PUF circuit includes a PUF challenge memory as a first PUF memory, and a PUF response memory as a second PUF memory. As a non-limiting example, the PUF challenge memory can be in a first logical PUF layer, and the PUF response memory can be in a second logical PUF layer. A logical PUF layer means a circuit or circuit system having a challenge input and one or more response outputs whose logic value...