Sigma-delta analog-to-digital converter adopting two-step process and hardware multiplexing

The invention relates to the field of digital-analog hybrid integrated circuit design. In order to reducing the conversion time required by a high-accuracy sigma-delta analog-to-digital converter without greatly increasing the area and the power consumption and without increasing the analog circuit accuracy and matching degree requirements at the same time. Thus, the invention adopts the following technical scheme that a sigma-delta analog-to-digital converter adopting two-step process and hardware multiplexing is disclosed, the sigma-delta analog-to-digital converter comprises a switched capacitor integrator, a 1.5-bit analog-to-digital converter, a 1.5-bit digital-to-analog converter, an adder, a multiplexer, a register and a counter; the multiplexer comprises a linked switch S1 and a linked switch S3, an input signal is outputted by the linked switch S1, the adder, the switched capacitor integrator, the 1.5-bit analog-to-digital converter, the linked switch S1, the counter and another adder successively. The sigma-delta analog-to-digital converter of the invention is mainly used in digital-analog hybrid integrated circuits.