Integrated circuit package system with interconnect lock

Active Publication Date: 2009-06-18
STATS CHIPPAC LTD
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

However, integrated circuit density continues to be limited by the “real estate” available for mounting individual integrated circuits on a substrate.
Multi-chip packages whether vertically or horizontally arranged, can also present problems because they usually must be pre-assembled before the integrated circuit and integrated circuit connections can be tested.
Thus, when integrated circuits are mounted and connected in a multi-chip module, individual integrated circuits and connections cannot be tested individually, and it is not possible to identify known-good-die (“KGD”) before being assembled into larger circuits.
Consequently, conventional multi-chip packages lead to assembly process yield problems.
This fabrication process, which does not identify KGD, is therefore less reliable and more prone to assembly defects.
Moreover, vertically stacked integrated circuits in typical multi-chip packages can present problems beyond those of horizontally arranged integrated circuit packages, further complicating the manufacturing process.
It is more difficult to test and thus determine the actual failure mode of the individual integrated circuits.
Moreover, the substrate and integrated circuit are often damaged during assembly or testing, complicating the manufacturing process and increasing costs.
For example, the encapsulating process for forming the packaged integrated circuit may cause contamination, such as mold flash or bleed, impeding reliable attachments.
Another example, for integrated circuit packages having a recess in the encapsulation, contoured mold chase are used to form the recess which increases the risk of mold flashes, damage to the package structure from contact with the contoured portion of the mold chase, and the manufacturing cost to design specific mold chase for the desired recess in the encapsulation.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.

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  • Integrated circuit package system with interconnect lock
  • Integrated circuit package system with interconnect lock
  • Integrated circuit package system with interconnect lock

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[0024]The following embodiments are described in sufficient detail to enable those skilled in the art to make and use the invention. It is to be understood that other embodiments would be evident based on the present disclosure, and that system, process, or mechanical changes may be made without departing from the scope of the present invention.

[0025]In the following description, numerous specific details are given to provide a thorough understanding of the invention. However, it will be apparent that the invention may be practiced without these specific details. In order to avoid obscuring the present invention, some well-known circuits, system configurations, and process steps are not disclosed in detail. Likewise, the drawings showing embodiments of the system are semi-diagrammatic and not to scale and, particularly, some of the dimensions are for the clarity of presentation and are shown greatly exaggerated in the drawing FIGs. Generally, the invention can be operated in any orient

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Abstract

An integrated circuit package system includes: mounting a device structure over a package carrier; connecting an internal interconnect between the device structure and the package carrier; forming an interconnect lock over the internal interconnect over the device structure with interconnect lock exposing the device structure; and forming a package encapsulation adjacent to the interconnect lock and over the package carrier.

Description

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Claims

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Application Information

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Owner STATS CHIPPAC LTD
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