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3 results about "Logical address" patented technology

In computing, a logical address is the address at which an item (memory cell, storage element, network host) appears to reside from the perspective of an executing application program. A logical address may be different from the physical address due to the operation of an address translator or mapping function. Such mapping functions may be, in the case of a computer memory architecture, a memory management unit (MMU) between the CPU and the memory bus.

Flash memory management method and flash memory device

ActiveCN102841851AIncrease write speedIncrease profitMemory adressing/allocation/relocationLogical addressCopy move
The invention relates to a flash memory management method and a flash memory device. The flash memory management method comprises following steps of dividing all active blocks of a flash memory into a data area and a switching area; dividing a logical page of the data area according to the area, wherein each area comprises a plurality of logical pages; and establishing a page mapping table of each area, and recording a correspondence relation of a logical page address and a physical page address in the page mapping table. According to the flash memory management method and the flash memory device, the data area of the flash memory is divided into different areas, the page mapping table of each area is established, the correspondence relation of the logical page address and the physical page address is recorded in the page mapping table, the flash memory is managed by adopting the page as a unit, when data is written in the flash memory, the data can be written into the flash memory according to the page sequence, after multiple pages of one block are fulfilled, the data is written into a next empty block, the utilization rate of the block is improved, the copy moving operation and erasing operation of the data can be reduced, the writing-in speed of the flash memory is improved, and the occupation of an internal memory can be reduced by establishing the page mapping table according to the areas.
Owner:SHENZHEN NETCOM ELECTRONICS CO LTD

L2P mapping table reconstruction method and solid state disk

ActiveCN114415942AShorten the timeReduce the number of timesInput/output to record carriersEnergy efficient computingAlgorithmReconstruction method
The invention discloses an L2P mapping table reconstruction method and a solid state disk, a plurality of data, continuous logic addresses and count values in each data block are stored in a plurality of 4K cells of a physical block according to a continuous programming sequence, and the L2P mapping table reconstruction method comprises the following steps: reading the last 4K cell of the physical block when power is on after abnormal power failure, obtaining a first last logic address and a first last count value stored in the first last logic address; calculating a first first physical address of the first data by using the array table; and establishing an L2P mapping table according to the corresponding relationship between the first first logic address and the first first physical address of the first data. According to the method, a count value is also stored during data storage, so that the count value and the logic address of the last data stored in the physical block can be obtained when the last 4K cell is read, and the address mapping relation of the first data can be obtained through the array table, so that the L2P mapping table is recovered, the reading frequency is reduced, the power-on table building time is saved, and the working efficiency is improved. The power consumption is reduced.
Owner:MAXIO TECH (HANGZHOU) CO LTD
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