Manufacturing method for low-temperature polycrystalline silicon thin film transistor and array substrate

The embodiment of the invention discloses a manufacturing method for a low-temperature polycrystalline silicon thin film transistor and an array substrate and relates to the technical field of display. The manufacturing method solves the technical problem that a source electrode or a drain electrode does not make good contact with an active layer. The manufacturing method comprises the steps that a pattern containing the active layer is formed on a substrate, wherein the active layer contains low-temperature polycrystalline silicon; a gate insulation layer is formed on the substrate where the pattern containing the active layer is formed; a pattern containing a grid electrode is formed on the substrate where the gate insulation layer is formed; an interlayer insulating layer is formed on the substrate where the pattern containing the grid electrode is formed, and contact holes corresponding to the source electrode and the drain electrode are formed in the interlayer insulating layer and the gate insulation layer through a composition process; the low-temperature polycrystalline silicon is formed at the bottoms of the contact holes; a pattern containing the source electrode and the drain electrode is formed, and the source electrode and the drain electrode are connected with the active layer through the contact holes and the low-temperature polycrystalline silicon at the bottoms of the contact holes.