Multi-carrier data processing method and device and storage medium
A data processing and multi-carrier technology, which is applied in the communication field, can solve the problems of high multi-carrier data resource occupancy rate and low processing efficiency, and achieve the effect of reducing resource occupancy rate and improving processing efficiency
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Example Embodiment
[0045] Example 1
[0046] refer to figure 2 , which shows a flow chart of specific steps of a multi-carrier data processing method provided in Embodiment 1 of the present invention.
[0047]Step 101: Obtain a data format of an interleaved signal, where the interleaved signal includes at least two antenna signals and at least two carrier data, and the sampling frequencies of the at least two carrier data are the same.
[0048] In this embodiment of the present invention, when the preset clock frequency is a multiple of the sampling frequency of the carrier data, at least two carrier data are interleaved to obtain an interleaved signal. For example, there are three single-carrier two-antenna signals c0a0c0a1, c1a0c1a1, and c2a0c2a1 , where c0, c1, and c2 are three carriers respectively, antenna a0 and antenna a1 correspond to one carrier respectively, the sampling frequencies of the three carriers c0, c1 and c2 are the same, and the preset clock frequency is a multiple of the sam
Example Embodiment
[0069] Embodiment 2
[0070] refer to Figure 7 , which shows a flow chart of specific steps of a multi-carrier data processing method provided in Embodiment 2 of the present invention.
[0071] Step 201: Acquire at least two carrier data, the sampling frequencies of the at least two carrier data are the same, and the sampling frequency is a factor of a preset clock frequency.
[0072] The preset clock frequency is the operating frequency of the apparatus for executing the multi-carrier data processing method provided by the embodiment of the present invention, for example, the clock frequency of an FPGA (Field Programmable Gate Array, field programmable gate array). provided by the present invention Figure 4 The NCO model shown as an example, the preset clock frequency is the operating frequency of the NCO model, and the Figure 4 In the NCO model shown, the operating frequencies of each module are the same, which can be represented by the clock frequency.
[0073] In this
Example Embodiment
[0150] Embodiment 3
[0151] refer to Figure 13 , which shows a structural diagram of a device provided in Embodiment 3 of the present invention, which specifically includes:
[0152] The memory 300 is used to store computer programs.
[0153] The transceiver 310 is used to receive and transmit data under the control of the processor 320 .
[0154] The processor 320 is configured to read the computer program in the memory 300 and perform the following operations:
[0155] A11. Obtain a data format of an interleaved signal, where the interleaved signal includes at least two antenna signals and at least two carrier data, and the sampling frequencies of the at least two carrier data are consistent;
[0156] A12. Determine the direct digital frequency signal and the complex frequency domain signal of the interleaved signal according to the data format and the sampling frequency;
[0157] A13. Perform frequency-moving processing on the interleaved signal according to the direct d
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