Static floating point arithmetic unit for embedded digital signals processing and control method thereof

[0024] The representation of a floating point includes a mantissa portion and an exponent portion. When the floating-point arithmetic unit adds floating point numbers, the mantissa portions of the two numbers to-be-added are shifted in order to make the exponent potions of the two numbers become the same. Then the arithmetic unit adds the mantissa portions. At last, the exponent portion of the calculated result is adjusted to make the mantissa portion maintain effective precision within a fixed range. When performing multiple operation, the floating-point arithmetic unit multiples the mantissa portions, and then adds the exponent portions. No matter multiplying or adding operation, the floating point arithmetic unit is capable of dynamically processing the mantissa portion and exponent portion of the numeral to maintain precision.

[0025] According to the principle in accordance with the invention, FIG. 1 illustrates the configuration of the static floating point arithmetic unit in acco