Multiplying digital to analog converter and multipath pipe line analog to digital converter using the same

[0036] Hereinafter, the MDAC according to a first embodiment of the present invention will be described.

[0037] Referring to FIG. 3, the MDAC includes a digital to analog converter (DAC) 100 and an amplifier 200. The DAC 100 includes a first capacitor array (C1 to CN) 110, a second capacitor array (C1B to CNB) 120, first selection circuits S1 to SN, and second selection circuits S1B to SNB. The amplifier 200 includes a first amplifier A1, a second amplifier A2, compensation capacitors CC and CCB, feedback capacitors CF and CFB, and switches SW3, SW3B, SW4, SW4B, and SW5.

[0038] Typically, an n-bit MDAC requires 2n capacitors. ‘N’ in the capacitor arrays represents 2n, and ‘n’ represents a number of bits of a digital signal to be converted in each stage according to the first embodiment of the present invention.

[0039] In the DAC 100, first ends of capacitors C1 to CN in the first capacitor array 110 are respectively coupled to the first selection circuits S1 to SN. Meanwhile, first end

[0066] With reference to FIG. 4, an MDAC according to a second embodiment of the present invention will be described.

[0067]FIG. 4 is a circuit diagram of the MDAC according to the second embodiment of the present invention.

[0068] As shown therein, the MDAC includes a DAC 100 which corresponds to the DAC in the first embodiment of the present invention, and an amplifier 300.

[0069] The amplifier 300 includes a first amplifier A1, a second amplifier A2, first compensation capacitors CC1 and CCB1, second compensation capacitors CC2 and CCB2, feedback capacitors CF and CFB, and switches SW3, SW3B, SW4, SW4B, and SW5.

[0070] A first end of the switch SW3 is coupled to input ends of the first capacitor array 110 and the first amplifier A1, and a second end thereof is coupled to an output end of the second amplifier A2. A first end of the switch SW4 is coupled to an output end of the first amplifier A1 and a first end of the first compensation capacitor CC1, and a second end thereof is coup

[0084] Referring to FIG. 5, a MDAC according to a third embodiment of the present invention will be described.

[0085]FIG. 5 is a circuit diagram of the MDAC according to the third embodiment of the present invention.

[0086] As shown therein, the MDAC includes a DAC 100 and an amplifier 400. The DAC 100 is similar to the DAC 100 according to the first embodiment of the present invention, and thus a detailed description will be omitted.

[0087] The amplifier 400 includes a first capacitor array 110, a first amplifier A1, a second amplifier A2, compensation capacitors CC and CCB, feedback capacitor CF and CFB, switches SW3, SW3B, and SW4, and a bias control 410.

[0088] In the amplifier 400, a first end of the switch SW3 is coupled to inputs of the first capacitor array 110 and the first amplifier A1, and a second end thereof is coupled to an output end of the second amplifier A2. A first end of the compensation capacitor Cc is coupled to an input end of the second amplifier A2, and a secon