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54results about "Electric signal transmission systems" patented technology

Detection of broadcast signals for defining useable frequency bands for powerline communication

ActiveUS20050035850A1Electric signal transmission systemsSystems with measurements/testing channelsFrequency bandPower-line communication
The present invention refers to a method for defining useable frequency bands for a powerline communication (PLC) system (101) using power supply lines of a power supply network (104a) for interconnecting a number of PLC nodes (302, 306) such that electromagnetic emissions generated by PLC signals (s(t)) transmitted via said power supply lines do not interfere with broadcast RF signals radiated in the same frequency bands. Before starting own communication activities, PLC nodes (302, 306) participating in a PLC session scan (S1a) the entire frequency range designated for powerline communication to detect (S1b) frequency bands which are occupied by broadcast services. During powerline communication the occurrence of broadcast signals is regularly checked (S2) by screening (S2a) the entire frequency range designated for powerline communication and detecting (S2b) relevant broadcast bands that should be omitted during powerline communication to avoid interference noise (n(t)). After that, new frequency bands for powerline communication are allocated (S3) within said frequency range, provided that these new bands are not occupied by any detected wireless service.
Owner:SONY DEUT GMBH

Differential pipelined analog to digital converter with successive approximation register subconverter stages

InactiveUS6879277B1Improve conversion speedReduce power consumptionElectric signal transmission systemsAnalogue-digital convertersAnalog-to-digital converterCapacitor
Pipelined analog to digital conversion systems are provided having cascaded multi-bit successive approximation register subconverter stages. Capacitor arrays are provided in the subconverter stages, where switching logic selectively couples the capacitors to operate in sample, conversion, and residue amplification modes for generating multi-bit subconverter digital outputs and analog subconverter residue outputs. In one implementation, the capacitors are switched according to a thermometer code to reduce differential converter non-linearity, and the first subconverter stage gain is reduced to improve the conversion system bandwidth.
Owner:TEXAS INSTR INC

Physiological information monitoring system and monitoring method

ActiveCN103230261APrevent leakageGuarantee privacy and securityElectric signal transmission systemsSensorsMedical emergencyInformation monitoring
The invention discloses a physiological information monitoring system comprising a physiological information collector, a remote data terminal and a hospital monitoring center, wherein the physiological information collector is used for collecting a physiological signal, encrypting the collected physiological signal data and transmitting the physiological signal data to the remote data terminal, the remote data terminal is used for adding an identification code on the received physiological signal data and transmitting the physiological signal data to the hospital monitoring center, and the hospital monitoring center is used for decrypting, storing and analyzing the physiological signal data and sending a diagnostic report to the remote data terminal. The invention further provides a monitoring method. The physiological information monitoring system and the physiological information monitoring method disclosed by the invention are used for solving the problem of low privacy safety of subjects and low utilization rate of monitoring information, the collected physiological signal data are transmitted after being encrypted, thereby preventing the physiological information of the subjects from being leaked by illegal monitoring in the transmission process; and the hospital monitoring center analyzes the received data and provides the diagnostic report to provide illness condition caution to the subjects in time.
Owner:MIANYANG DEHUI AUTOMATION TECH CO LTD

Credit card verification system and method

InactiveUS6912312B1Accurate comparisonElectric signal transmission systemsImage analysisCredit cardCommunication unit
The invention provides a credit card verification system, including a credit card company data storage and communication unit (4) for recording and storing data concerning authorized credit card holders, including an electronically reproducible image of each credit card holder, means (6) for introducing the image into the company data storage unit, and at least one remotely positioned credit card reader (10) and image display meants (12) communicating with the company data storage unit, for selectively retrieving data from the storage unit to be displayed on the image display means, to be viewed and approved by the person providing sales services. The invention also provides a method for verifying the identity of a credit card holder effecting a tansaction and a method enabling credit companies to monitor and verify credit card holder identity when a payment transaction is performed at a sales terminal.
Owner:CALLAHAN CELLULAR L L C

Digital to analog converter

ActiveUS6992609B1Electric signal transmission systemsDigital-analogue convertorsDigital analog converterSubject matter
The present invention provides a high speed digital-to-analog converter (DAC), and components for a high speed DAC. One embodiment of the present invention provides a novel current switching circuit that surmounts parasitic capacitance of the circuit elements. In another embodiment, the DAC includes a novel built-in-test circuit, which allows tests of the DAC at high speeds. One feature of the DAC constructed according to the present invention, is that it enables direct digital synthesis of communication waveforms. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to quickly ascertain the subject matter of the disclosure contained herein. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
Owner:NVIDIA CORP

Neuromorphic calculation circuit based on multi-bit parallel binary synaptic array

ActiveCN110378475AReduce power consumptionReduce areaAnalogue/digital conversionElectric signal transmission systemsIntegratorHigh energy
The invention discloses a neuromorphic calculation circuit based on a multi-bit parallel binary synapse array. The neuromorphic calculation circuit comprises a neural axon module, the multi-bit parallel binary RRAM synapse array, a time division multiplexer, a plurality of integrators and a shared successive approximation analog-to-digital converter, wherein the neural axon module comprises two basic units, namely a time sequence scheduler and an adder, and the time sequence scheduler is used for arranging the time sequence of signals, so that input signals are sequentially input into a multi-bit parallel binary RRAM synapse array by adopting a dendritic priority strategy; the adder is used for expanding the array scale, and when the configured neural network input layer is greater than the input of one RRAM array, the adder is used for adding the calculation results of the plurality of arrays to obtain the output of the network layer. Compared with the current system, the method has the advantages of high precision and low power consumption, can be configured into most deep neural network applications, and is particularly suitable for being deployed in edge computing equipment with high energy consumption requirements.
Owner:ZHEJIANG UNIV

Biometric security assembly

InactiveUS20050182947A1Limited supplyNot to damageElectric signal transmission systemsDigital data processing detailsEngineeringBiometric data
A biometric key (10) having a body or housing (11) incorporating a biometric sensor (17) uses a plurality of contacts (19, 20, 21) enabling the key to gain access to a facility. There is also provided a receptor (25) for receiving the biometric key (10), wherein the biometric key (10) and receptor (24) have contacts (19, 20, 21) and mating contacts (30, 31, 32), respectively, for communicating. The biometric key (10) can communicate biometric data acquired from a key operator to the receptor (25). The biometric key (10) can communicate with the receptor (25) when received in a first orientation and also when received in a second orientation where the contacts (19, 20, 21) are inverted from the first orientation.
Owner:MU HUA INVESTMENT

Sampling hold circuit

InactiveCN103036569ALeak won'tImprove linearityAnalogue/digital conversionElectric signal transmission systemsCapacitanceLinearity
The invention discloses a sampling hold circuit which comprises a clock generation sub-circuit, a grid voltage bootstrap unit and a sampling hold sub-circuit, wherein the clock generation sub-circuit is provided with a first output end and a second output end, the first output end and the second output end are both connected with the grid voltage bootstrap unit, the sampling hold sub-circuit comprises a sampling switch and a holding capacitor, and the grid voltage bootstrap unit is further connected with an external power supply and the sampling switch. The sampling hold circuit further comprises a leak-proof sub-circuit which is connected between a bootstrap capacitor of the grid voltage bootstrap unit and the ground, and the leak-proof sub-circuit is further connected with the clock generation sub-circuit and the external power supply. When the sampling hold sub-circuit is switched from a hold mode to a sampling mode, the bootstrap capacitor and the ground are disconnected by the leak-proof sub-circuit. According to the sampling hold circuit, leakage of electric charge on the bootstrap capacitor in a hold and sampling switching process is effectively prevented, and reducing of bootstrap voltage is prevented, and the degree of linearity of the sampling switch is guaranteed.
Owner:IPGOAL MICROELECTRONICS (SICHUAN) CO LTD

Method and device for determining region of ammeter by detecting signal intensity

InactiveCN103310623AElectric signal transmission systemsTransmission noise suppressionData transmissionAutomatic meter reading
The invention discloses a method and a device for determining a region of an ammeter by detecting signal intensity. According to the method, when a master station discovers that two concentrators collects the data transmitted by the same ammeter, the two concentrators are enabled to detect the intensity of a received signal transmitted by the ammeter, the ammeter can be determined to belong to a party with high receiving signal intensity, so that the crosstalk problem in an automatic meter reading system can be solved. The device comprises a signal collecting module, a concentrator data transmission module, a signal intensity detection module and a region determining module, wherein the signal collecting module is used for respectively collecting the data transmitted by the ammeter in each region for the corresponding concentrator; the concentrator data transmission module is used for transmitting the data of the ammeter, collected by each concentrator, to the master station; the signal intensity detection module is used for transmitting a command for enabling the two concentrators to respectively detect the intensity of the signal transmitted by the same ammeter when the two concentrators are discovered by the master station to collect the data transmitted by the same ammeter; the region determining module is used for judging that the same ammeter belongs to the region corresponding to the concentrator with high received signal intensity.
Owner:BEIJING XIAOCHENG TECH CO LTD

System and method for measuring a high speed signal

ActiveUS20050013355A1Transmitters monitoringElectric signal transmission systemsVoltage generatorFall time
An apparatus is provided for measuring an output of a high-speed data transmission circuit. The apparatus includes a programmable reference voltage generator operable to generate a reference voltage that is variable between a plurality of levels. The apparatus also includes a quantizer to quantize an output of the high-speed data transmission circuit relative to the reference voltage level input thereto. Also included is a clock generator operable to generate a clock having a transitioning time (rise-time, fall-time or both) that is less than one quarter of a minimum switching period of the output of the circuit. Finally, the apparatus includes a sampler operable to sample the quantized output with the clock to produce a plurality of samples which measure the output of the circuit.
Owner:MARVELL ASIA PTE LTD

Electronic tag broadcasting system and broadcasting method using electronic tag

InactiveUS20100245035A1Electric signal transmission systemsDigital data processing detailsBroadcast systemElectronic tags
An electronic tag broadcasting system and a broadcasting method using an electronic tag are provided. The electronic tag broadcasting system makes it possible to include information on photographed objects in a broadcasting signal, greatly change the combination of information by means of conventional manual operations, increase benefits of bi-directional broadcasting and the combination of broadcasting / communication by using recognition information included in broadcasting contents, and create a lot of new products and a large market. Popularity of broadcasting increases usage of electronic tags and their related application, thereby providing various service convergence that combines RFID, USN, communication, broadcasting, etc. and leading to a convenient ubiquitous society.
Owner:ELECTRONICS & TELECOMM RES INST

Digital background calibration device for pipeline ADC

InactiveCN105959005AElectric signal transmission systemsAnalogue/digital conversion calibration/testingCalibration algorithmAnalog circuit design
The invention provides a digital background calibration device for a pipeline ADC. The device comprises multiple cascaded sub pipelines and a calibration circuit. Each sub pipeline comprises a sampling/holding circuit, a residue amplifier, a Sub-ADC and a Sub-DAC. Analog signals pass through each sub pipeline of the pipeline ADC in order. A pseudo random sequence generated by the calibration circuit is input to the Sub-DAC of the calibrated-level sub pipeline while analog quantity is input to the calibrated-level sub pipeline. The calibration circuit uses the pseudo random sequence and digital values that are converted by all sub pipelines subsequent to the calibrated-level sub pipeline and are already calibrated to calibrate digital values that are converted by the calibrated-level sub pipeline, so as to obtain digital values which are converted by the calibrated-level sub pipeline and are already calibrated. The digital background calibration device of the invention overcomes the defects caused by modification of analog circuits as to existing calibration algorithms and can simultaneously correct errors caused by capacitor mismatch and finite gains of operational amplifiers, without interrupting normal work of ADCs or changing the original analog circuit design. In particular, errors introduced by the calibration algorithm are reduced, the calibration cost is low and the calibration accuracy is high.
Owner:BEIJING JIAOTONG UNIV
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