Nanotube memory structure and preparation method thereof

The invention provides a nanotube memory structure and a preparation method thereof. The nanotube memory structure comprises the components of a semiconductor substrate with a heavily doped epitaxiallayer on the surface; a first isolating dielectric layer, a ground selecting gate electrode layer, a bit line gate electrode layer, a string selecting gate electrode layer, and multiple second isolating dielectric layers among the ground selecting gate electrode layer, the bit line gate electrode layer and the string selecting gate electrode layer, wherein the first isolating dielectric layer, theground selecting gate electrode layer, the bit line gate electrode layer, the string selecting gate electrode layer and the multiple second isolating dielectric layers are arranged on the semiconductor substrate; a semiconductor channel which penetrates through the ground selecting gate electrode layer, the bit line gate electrode layer and the string selecting gate electrode layer; and a gate electrode dielectric layer which packages the sidewall of the semiconductor channel, wherein the semiconductor channel is a semiconductor nanotube on the heavily doped epitaxial layer. According to thememory structure, the semiconductor nanotube which epitaxially grows on the heavily doped epitaxial layer is used as the vertical channel; and compared with an existing vertical channel type NAND structure, the nanotube memory structure has advantages of further simplified device structure, easy controlling for the preparation process, and high yield rate of products.