Array substrate, manufacturing method thereof, and display panel

[0069]The following description of the various embodiments is provided with reference to the accompanying drawings. Directional terms, such as upper, lower, front, back, left, right, inner, outer, and lateral side, mentioned in the present invention are only for reference. Therefore, the directional terms are used for describing and understanding rather than limiting the present invention. In the figures, units having similar structures are used for the same reference numbers.

[0070]The present invention provides a manufacturing method of an array substrate to alleviate a technical problem that a planarization layer in a current array substrate is not well filled.

[0071]As shown in FIG. 2, the present invention provides an array substrate comprising a substrate 101, a buffer layer 103, an active layer 104, a gate insulating layer 107, a gate layer, an interlayer dielectric layer 109, a source drain layer, and a planarization layer 113.

[0072]The substrate 101 may be a rigid substrate or a