Transistor and formation method thereof
A transistor and topography technology, applied in the manufacture of transistors, semiconductor devices, semiconductor/solid-state devices, etc., can solve the problems of large leakage current of transistors, difficult to control transistor formation process, poor reliability, etc., to reduce the gate resistivity, Superior performance and high reliability
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[0033] It can be known from the background technology that the prior art process for forming transistors has problems such as low reliability and large leakage current.
[0034] To this end, the transistor formation process is studied and found that the transistor formation process includes the following steps, please refer to figure 1 : Step S1, providing a semiconductor substrate; step S2, sequentially forming a gate dielectric layer, a barrier layer on the surface of the gate dielectric layer, and a sacrificial layer on the surface of the barrier layer on the surface of the semiconductor substrate; step S3, on the semiconductor substrate An interlayer dielectric layer is formed on the bottom surface, and the surface of the interlayer dielectric layer is flush with the top of the sacrificial layer; step S4, the sacrificial layer is removed to form a groove; step S5, a covering barrier layer is formed in the groove and The surface of the metal layer filled with the groove is flush w
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