Super junction device

The invention discloses a super junction device, a P-type ring is formed in a transition region, and a layout structure comprises a gate bus composed of a front metal layer, a gate liner and a sourcemetal layer; the gate bus and the gate liner are surrounded by the source metal layer; the gate bus is completely located above the region of the charge flow region; the P-type ring surrounds the gatebus and the gate liner; the source electrode metal layer covers the grid electrode bus and the charge flowing region outside the grid electrode liner and extends to the upper part of the P-type ring;each gate conductive material layer is connected to the corresponding gate bus or gate liner through a first contact hole, a plurality of second contact holes connected to the source metal layer areformed in the P-type ring, and a non-intersection structure between the gate conductive material layer and the P-type ring enables the second contact holes to be formed in each area of the top of theP-type ring. According to the invention, the EAS capability and the UIS capability of the device can be improved, the gate structure can be prevented from being damaged by a high electric field, and the chip size can be effectively saved.