System for arraying surface mount grid array contact pads to optimize trace escape routing for a printed circuit board

Active Publication Date: 2007-01-09
NVIDIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0018]In this manner, the trace escape channels minimize the impact of the vias on the trace escape routing of the PCB, thereby allowing a trace escape routing pattern from an integrated circuit device to be implemented with fewer PCB layers in comparison to the prior art. The reduction in the number of PCB layers required leads to a corresponding reduction in the cost of the resulting PCB, and a corresponding increase in the reliability of the resulting PCB. Additionally, the use of trace escape channels provide an added degree of trace esc

Problems solved by technology

As the complexity of integrated circuit technology has increased, the sophistication and complexity of PCB technology has also increased.
A problem exists however, in the use of multilayer PCBs.
Since each layer is fabricated using a separate etching process, each added layer adds to the expense of the overall PCB.
Additionally, since each layer must be glued or otherwise combined with the other layers, the process of combining the layers adds to the expense and also increases the chances of introducing flaws into the finished PCB.
Another problem exists in the fact that interconnections between the layers of a PCB are implemented using “vias” which penetrate the trace conductor patterns of one layer to form a connection with the trace conductor patterns of another layer.
Such vias waste space that could otherwise be used to route other signal traces.
This can be particularly problematic in the case of a complex integrated circuit component having several hundred signal traces which must be routed.
The traditional disposition of vias across a PCB is a dominant obstruction that can cons

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  • System for arraying surface mount grid array contact pads to optimize trace escape routing for a printed circuit board
  • System for arraying surface mount grid array contact pads to optimize trace escape routing for a printed circuit board
  • System for arraying surface mount grid array contact pads to optimize trace escape routing for a printed circuit board

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Embodiment Construction

[0036]Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the preferred embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of embodiments of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be recognized by one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail as

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Abstract

A surface mount grid array implemented on a PCB (printed circuit board) optimized for trace escape routing for the PCB. The surface mount grid array includes a plurality of connection blocks, with each connection block including an array of pins and an array of vias, wherein the pins and vias are configured to communicatively connect an integrated circuit device to a plurality of traces of the PCB. The connection blocks are disposed in a tiled arrangement, wherein the connection blocks implement a plurality of trace escape channels along connection block boundaries. The trace escape channels are configured for routing traces from inner pins of the surface mount grid array to a periphery of the surface mount grid array.

Description

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Claims

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Application Information

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Owner NVIDIA CORP
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