The invention discloses a nonvalatile memory
system with variable
error correcting capability, which comprises a
system bus interface module, an RS
encoder, an RS decoder, an NAND read-write
time sequence generator and an
error correcting capability configuration module. The
error correcting capability configuration module carries out order input and error correcting
information feedback with outside world through the
bus interface module. The error correcting capability configuration module carries out error correcting capability configuration to the RS
encoder and the RS decoder respectively in accordance with instructions and outputs feedback information obtained from the RS
encoder and the RS decoder respectively through the
bus interface module. The
system takes both speed and error correcting capacity into consideration, thus realizing the error correcting capacity adjustment in various environments so as to obtain the best error correcting configuration.