Online upgrading method and system for programmable logic device

A technology for programming logic and devices, which is applied in the online upgrade method and system field of programmable logic devices, can solve the problems affecting the normal realization of functions, the reduction of GPIO pin resources, etc., and achieve the effect of reducing the impact

Inactive Publication Date: 2021-09-17
NEW H3C SECURITY TECH CO LTD
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0003] However, this online upgrade method will occupy 4 GPIO pins in the CPU, and the GPIO pins of the CPU are often used for multiplexing. Therefore, if the 4 GPIO pins are fixed for online upgrade, other functions will be lost. The available GPIO pin resources are reduced, affecting the normal implementation of other functions

Method used

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Examples

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Embodiment Construction

[0061] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art based on the present application belong to the protection scope of the present invention.

[0062] see figure 1 , figure 1 Shown is a schematic flow chart of an online upgrade method for a programmable logic device provided by an embodiment of the present invention. The online upgrade method for a programmable logic device is applied to a first CPLD, and the first CPLD includes a first IO pin group, a second The IO pin group, the first bus pin group, the first IO pin group is connected to the first bus pin group, the second IO pin group is connecte...

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Abstract

The embodiment of the invention provides an online upgrading method and system for a programmable logic device. The method comprises the following steps: receiving a target serial port signal carrying an upgrade file, which is sent by a CPU through a serial port pin group, through a second IO pin group; based on a mapping relation between a preset serial port signal and a bus signal, determining a target bus signal corresponding to the target serial port signal, the target bus signal carrying the upgrade file; and sending the target bus signal to a first bus pin group through a first IO pin group so as to write the upgrade file into a first programmable logic device through the target bus signal. On-line upgrading of the programmable logic device can be achieved under the condition that GPIO resources of the CPU are not occupied.

Description

technical field [0001] The invention relates to the technical field of programmable logic devices, in particular to an online upgrade method and system for programmable logic devices. Background technique [0002] In related technologies, in the online upgrade process of CPLD (Complex Programmable Logic Device, programmable logic device), it is necessary to occupy the GPIO (General-purpose input / output, general-purpose input and output) pins of CPU to simulate JTAG (Joint Test Action Group , Joint Test Working Group) sequence, to send the upgrade file to the CPLD, so as to realize the online upgrade of the CPLD. [0003] However, this online upgrade method will occupy 4 GPIO pins in the CPU, and the GPIO pins of the CPU are often used for multiplexing. Therefore, if the 4 GPIO pins are fixed for online upgrade, other functions will be lost. The available GPIO pin resources are reduced, affecting the normal implementation of other functions. Contents of the invention [0...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F8/656
CPCG06F8/656
Inventor 李孟琦邱平彭日刚严伟
Owner NEW H3C SECURITY TECH CO LTD
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