7 results about "Programmable logic device" patented technology

A method of input/output (I/O) assignment for a circuit design for a programmable logic device (PLD) can include determining I/O types for I/O objects specified by the circuit design, defining a plurality of virtual I/O bank-groups, wherein each virtual I/O bank-group includes at least one virtual I/O bank, and binding I/O objects of the circuit design into I/O groups according to the I/O types. A binary compatibility matrix can be created. The binary compatibility matrix can indicate the compatibility between the virtual I/O bank-groups and the I/O groups based upon the I/O types of I/O objects within each I/O group. A determination can be made as to whether a feasible solution exists for I/O assignment of the I/O objects of the circuit design according to a plurality of constraints and the binary compatibility matrix.

The invention relates to a logic resource test technique of programmable device, which can utilize the logic resource most and design it as tested circuit based on the character of device and the direction of signal, to test the circuit, and realize logic resource function test and direct-current and alternative-current parameter test. The invention has the advantages that: it provides a logic resource model and test technique based on measurable design technique; it uses one0time program/erase to complete the whole test of logic resource. And the inventive function test covering rate, the direct-current and alternative-current parameter test covering rates all reach 100%.

A computer-implemented method of measuring bridge fault coverage for a test pattern for a circuit design to be implemented within a programmable logic device can include identifying simulation results and stuck at coverage of the circuit design for the test pattern (610, 620). Pairs of nets in the circuit design that are adjacent can be identified (625). Each type of bridge fault for which each pair is tested can be determined according to the simulation results (640, 645, 655, 660). A measure of bridge fault coverage for the test pattern can be calculated according to which types of bridge faults each pair is tested and which net of each pair acts as an aggressor for each type of bridge fault tested (675). The measure of bridge fault coverage can be output (680).

The invention discloses a server uncovering detection method and system; the method comprises the steps: whether uncovering is safe or not is determined when a substrate management controller detects the triggering of an uncovering signal; when it is judged that the cover is opened safely, the complex programmable logic device controls the power supply chip to output normal working voltage to the hard disk; and when it is judged that uncovering is not safe, the complex programmable logic device switches a power supply circuit of the power supply chip and outputs self-destruction voltage to the hard disk, and the hard disk triggers self-destruction. The system comprises a substrate management controller, a safety key, a complex programmable logic device, a power supply chip and a hard disk. According to the invention, the risk of data leakage of the server can be reduced, the security protection of the server is realized, the risk of secret-related data leakage caused by attacking or prizing up the server is reduced, the rapid data protection of the server is increased, and the permanent protection of the data of the server is ensured.