Planar power MOSFET device integrated with junction barrier Schottky diode

The invention discloses a planar power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device integrated with a junction barrier Schottky diode, which is used for solving the technical problem that conflicts exist when existing junction barrier Schottky cells and MOSFET cells jointly occupy an active region part of the device. The device comprises an epitaxial layer and a plurality of cells which are distributed on the first side surface of the epitaxial layer and have the same shape and structure, each cell at least comprises a well region, a source region, highly-doped P-type regions and a junction barrier Schottky region comprising a preset number of highly-doped P-type regions; a junction field effect transistor (JFET) region is formed between the well regions; a first PN junction is formed between the well region and the epitaxial layer, and a second PN junction is formed between the well region and the source region; a preset number of highly doped P-type regions in the junction barrier Schottky region and the epitaxial layer form a third PN junction; the value range of the distance between the JFET region and the highly doped P-type region is in the same preset interval. Through the device, the problem that conflicts exist when junction barrier Schottky cells and MOSFET cells jointly occupy the active region part of the device is solved.