PCI bridge with improved structure

[0010] Below in conjunction with accompanying drawing, the present invention is further described:

[0011] figure 1 It is a structural block diagram of the PCI main bridge. Including the following parts: PCI master controller; PCI host bridge internal cache FIFO, used to store command and control information from the system bus; system bus slave device; PCI slave device; internal registers, used to store internal control and status information; system The bus master is used to complete the read and write operations of the external devices on the PCI bus to the memory on the system bus; the PCI bus; the system bus; the external bus arbiter of the PCI main bridge is used to control the distribution bus. The PCI master controller mainly completes the CPU’s reading and writing operations on the external devices on the PCI bus through the system bus. When the CPU reads and writes external devices, the system bus slave device sends the first address of the external device to the F...