Field-effect transistor without punch-through stopper and fabrication method thereof

a field-effect transistor and punch-through stopper technology, applied in the field of field-effect transistors, can solve the problems of degrading the performance and reliability of the cells of the field-effect transistor, affecting the overall process, and increasing power consumption, so as to achieve high productivity and yield, reduce the effect of reliability degradation

Active Publication Date: 2020-07-30
POSTECH ACAD IND FOUND
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention relates to a field effect transistor that prevents issues like performance decline or reliability degrade over time due to forming a punch-through stopper. Additionally, it simplifies the entire process by eliminating the difficulty of removing a hard punch through stopper during production. This results in higher productivity and more reliable devices for use in electronic applications.

Problems solved by technology

The technical problem addressed by this patent is how to efficiently control the channel between two different sources/drains while minimizing power usage and improving device efficiency without compromising their performance and reliability. This requires a new type of transistors called FinFETs, which allows for better control over the channel due to its smaller dimensions.

Method used

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  • Field-effect transistor without punch-through stopper and fabrication method thereof
  • Field-effect transistor without punch-through stopper and fabrication method thereof
  • Field-effect transistor without punch-through stopper and fabrication method thereof

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first embodiment

[0029]FIG. 1 is a cross-sectional view of a field effect transistor according to the present disclosure. Specifically, the field effect transistor basically has the same structure as a metal oxide semiconductor field effect transistor (MOSFET).

[0030]Referring to FIG. 1, the field effect transistor includes a substrate 10, a first insulating film 20, Source and drain regions 30 and 40, a channel 50, a gate 60, and a second insulating film 70.

[0031]A conventional field effect transistor has a structure in which a punch-through stopper is formed under the channel. However, in the structure of the field effect transistor according to the present invention, the first insulating film is formed in an upper portion of the substrate 10 to replace the punch-through stopper.

[0032]Specifically, the first insulating film 20 is embedded in the substrate 10, and the source and drain regions 30 and 40 are formed on the first insulating film 20. The first insulating film 20 is partially in contact with

second embodiment

[0065]FIG. 8 is a cross-sectional view illustrating a nanosheet field effect transistor (NSFET), as one exemplary FET structure, according to the present invention. The structure of the NSFET shown in FIG. 8 is illustrated as a single stack in which nanosheets are stacked in three layers for convenience. However, the field effect transistor (FET) according to the present invention may have a multilayer single stack structure in which n or more layers are stacked. Alternatively, the field effect transistor may have a multilayer multi-stack structure including n or more stacks each stack being composed of n or more layers.

[0066]Referring to FIG. 8, the field effect transistor includes a substrate 110, first insulating films 120 partially embedded in an upper portion of the substrate 110, a source region 130 and a drain region 140 respectively positioned on the first insulating films 120, a plurality of horizontally extending channels 150 and a plurality of spacings 180 alternatively arra

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Abstract

Disclosed is a field effect transistor including an insulating film disposed between a source/drain region and a substrate. Since the insulating film prevents current leakage under a channel, it is not necessary to form a punch-through stopper. Further disclosed is a method of forming a field effect transistor.

Description

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Claims

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Application Information

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Owner POSTECH ACAD IND FOUND
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