Apparatus for dividing bank in flash memory

[0017]The present invention will now be described in detail in connection with preferred embodiments with reference to the accompanying drawings, in which like reference numerals are used to identify the same or similar parts.

[0018]FIG. 2 is a conceptual view illustrating the structure of a bank in a NAND flash memory according to a preferred embodiment of the present invention.

[0019]Referring to FIG. 2, proposed chip architecture has an entire memory cell array divided into a first bank 100 and a second bank 500. The first bank 100 and the second bank 500 include a first page buffer unit 200 for paging the first bank 100 and a second page buffer unit 400 for paging the second bank 500, respectively. The first page buffer unit 200 and the second page buffer unit 400 share the same input / output line 600 through a switching mean 300.

[0020]The first page buffer unit 200 and the second page buffer unit 400 can exchange data each other, which allows a counterpart to be used as a cache bu...