Multi-chip package structure and manufacturing method thereof

A technology of multi-chip packaging and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device parts, semiconductor devices, etc., can solve the problems of large interconnection distance between multiple chips in packaging volume, and achieve high production capacity and signal delay The effect of small size and small package volume

Pending Publication Date: 2019-09-06
SHANGHAI XIANFANG SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Although multi-chip modules have many advantages, the existing multi-chip packaging structure is still based on substrate, wire bonding and other technologies, and its packaging volume and interconnection distance between multi-chips are still relatively large.

Method used

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  • Multi-chip package structure and manufacturing method thereof
  • Multi-chip package structure and manufacturing method thereof
  • Multi-chip package structure and manufacturing method thereof

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Embodiment Construction

[0038] In the following description, the present invention is described with reference to various examples. One skilled in the art will recognize, however, that the various embodiments may be practiced without one or more of the specific details, or with other alternative and / or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail so as not to obscure aspects of the various embodiments of the invention. Similarly, for purposes of explanation, specific quantities, materials and configurations are set forth in order to provide a thorough understanding of embodiments of the invention. However, the invention may be practiced without these specific details. Furthermore, it should be understood that the various embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0039] In this specification, reference to "one embodiment" or "the...

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Abstract

The invention discloses a multi-chip package structure. The multi-chip package structure comprises a plastic package layer, a first chip, a connection plate, a second chip, a glue filling layer, a rewiring layer, a dielectric layer and an external welding ball, wherein the first chip is coated in the plastic package layer and is provided with a first pin and a second pin, a first surface of the connection plate is connected with the plastic package layer, a chip embedment groove and a conductive through hole are formed in the connection plate, the conductive through hole is electrically connected with the first pin of the first chip, the second chip is arranged in the chip embedment groove of the connection plate and is electrically connected with the second pin of the first chip, the gluefilling layer is filled in a gap between the second chip and the chip embedment groove and covers the second chip, the rewiring layer is arranged on the second surface of the connection plate and iselectrically connected with the conductive through hole, the dielectric layer is arranged on the second surface of the connection plate and is used for insulation protection among layers of the rewiring layers and among same-layer metal, and the external welding ball is electrically connected with the rewiring layer.

Description

technical field [0001] The invention relates to the technical field of chip packaging, in particular to a multi-chip packaging structure and a manufacturing method thereof. Background technique [0002] With the development of further miniaturization of electronic products, the solution of interconnecting multiple chips through a PCB substrate is gradually replaced by a multi-chip module (MCM) in many cases. A multi-chip module (MCM) refers to a component in which multiple integrated circuit chips are electrically connected to a common circuit substrate and uses it to realize interconnection between chips. It is a typical highly integrated component. Each chip in these components is usually unsealed assembled on a multilayer interconnected substrate by wire bonding, tape bonding or flip-chip, and then plastic-encapsulated to form a packaging structure. Compared with mounting the chip directly on the PCB, MCM has certain advantages. For example: (1) shortens the transmissio...

Claims

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Application Information

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IPC IPC(8): H01L25/18H01L23/31H01L21/98
CPCH01L25/18H01L23/3128H01L25/50H01L2924/181H01L2224/16225H01L2224/16145H01L2924/00012
Inventor 任玉龙孙鹏曹立强
Owner SHANGHAI XIANFANG SEMICON CO LTD
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