Sputter etch processing for heavy metal patterning in integrated circuits

[0011]In one embodiment, the invention is a method and apparatus for heavy metal patterning using a sputter etch process. Embodiments of the invention pattern fine metal lines on an insulating layer of an integrated circuit via a subtractive process (i.e., a process that creates a desired structure by removing material rather than by adding material). In a particular embodiment, the subtractive process uses chlorine and fluorine etch chemistry in a two-step process to control the patterning of hard masks on copper containing conductive metal. In particular, the disclosed process allows for easier control of the hard mask profile during subtractive copper and copper alloy etching, as well as easier control of the copper patterning.

[0012]FIGS. 2A-2J are schematic diagrams illustrating various stages of fabrication of a complementary metal-oxide-semiconductor (CMOS) device 200, according to embodiments of the present invention. As such, FIGS. 2A-2J also collectively serve as a flow diagra