8 results about "Inverter" patented technology

The invention relates to a modular multilevel converter (MMC)-based transformer-free four-quadrant high-voltage variable frequency power supply topological structure. A rectifier module and an inverter module have a modular multilevel structure and are formed by a plurality of subunits connected in series. The input side of the topological rectifier module is directly connected with a network-side high voltage through a charging circuit; the rectifier module converts a high-voltage alternating current (AC) voltage into a direct current (DC) voltage and inputs the DC voltage into the inverter module, and the inverter module converts the DC voltage into the AC voltage; and various states of a power system are simulated, and the topological structure has a four-quadrant type and can feed energy back. The topological structure has the advantages of removing the high-voltage transformer at the power input end, lowering cost, reducing volume and weight of a high-voltage variable frequency power supply, reducing consumption of components, and improving work efficiency, has a simple unit structure, and is convenient to wire and easy to disassemble and assemble.

An INVSRC node and a SAREF node are previously precharged. After a potential on a bit line is reset, the bit line (BLS node) is precharged. In this event, a clamp MOS transistor in a sense amplifier is in ON state, and an SA node is also precharged simultaneously. A precharge level is set to a value lower than a threshold voltage of an inverter. Subsequently, when SAEN transitions to “H,” a sense operation is performed. For reading data “0,” the SA node is rapidly increased to Vdd. For reading data “1,” the SA node slowly approaches to Vss. A change in the potential at the SA node is detected by the inverter.

A lead frame for electrically coupling a plurality of inverter legs of an inverter to a set of coil windings of an electric motor or generator, the lead frame comprising a printed circuit board having a plurality of circuit board layers. Each circuit board layer includes an insulating substrate having an electrically conductive layer formed on the insulating substrate. First, second and third circuit board layers each include a respective electrically conductive layer arranged to be coupled to a corresponding coil winding of the first set of coil windings and a respective inverter leg. A fourth circuit board layer includes a respective electrically conductive layer arranged to be coupled to all of the third coil windings to form a neutral point therebetween.

The invention discloses a photovoltaic grid-connected island detection method based on zero-sequence current injection. The photovoltaic grid-connected island detection method comprises the steps thatan island detection model is built; iabc flowing out of the DC/AC inverter passes through a transformer and then enters a power grid unit for operation; and if the signal relay acts, information is fed back to the DC/AC inverter, the DC/AC inverter is injected into I(0) at the moment, a zero-sequence current value at the PCC is detected, and if the zero-sequence current value at the PCC exceeds aset threshold value, the island state is judged. According to the photovoltaic grid-connected island detection method, the signal relay is used for sending the signal to the photovoltaic power generation unit, so that the problem of relatively high cost of a communication detection method is avoided; only when an alarm starting signal given by the signal relay is received, zero-sequence current disturbance is injected, so that the problem of large blind area of a passive detection method is avoided, and the influence of the active detection method on the electric energy quality is relieved toa certain extent.

Provided is an electric motor comprising: a rotor having a rotating shaft inserted therein; a stator which is disposed around the rotor and provided with three-phase windings; an inverter including three sets of upper-arm switches and lower-arm switches corresponding to the three phases, and a freewheeling diode connected in parallel to each of the switches in the three sets of upper-arm switches and lower-arm switches; and a controller which performs pulse width modulation for the three sets of upper-arm switches and lower-arm switches by non-complementary switching at a constant carrier frequency. Each of the switches is a super junction field-effect transistor. The controller performs pulse width modulation at a duty ratio with an on-time longer than an on-time of the upper-arm switches when the upper-arm switches and lower-arm switches operate by complementary switching.

A vibration-reducing frame structure of an inverter according to an embodiment of the present invention comprises: a base frame including a lower case and side cases standing on both sides of the lower case; and damping brackets coupled to the side cases and including standing brackets connecting the side cases across the space therebetween.

Circuits and methods for balancing Bias Temperature Instability (BTI) are disclosed. An inverter circuit comprises an inverter input node configured to receive an inverter input signal, wherein the inverter input node is coupled to gates of an inverter pair, wherein the inverter pair includes an inverter pair n-type metal-oxide-semiconductor (NMOS) transistor and an inverter pair p-type metal-oxide-semiconductor (PMOS) transistor, an inverter output node configured to provide an inverter output signal, wherein the inverter output signal is an inversion of the inverter input signal, and at least one balancing transistor configured to balance a voltage at a source of the inverter pair PMOS, a source of the inverter pair NMOS, or any combination thereof.