Silicon-germanium heterojunction bipolar transistor and manufacturing method thereof

A technology of heterojunction bipolar and manufacturing method, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as reducing current lag time, achieve the effect of reducing parasitic capacitance and improving overall operating frequency

Active Publication Date: 2011-04-27
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF0 Cites 24 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The presence of parasitic capacitances C1 and C2 will reduce the lag time for the current to flow from the outer base region

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0035] see figure 2 , which is an embodiment of the silicon-germanium HBT of the present invention. The silicon substrate 1 includes a deep isolation layer 2 , a shallow isolation layer 3 , a buried layer 4 , a collector region 5 and a collector lead-out region 6 .

[0036] The silicon substrate 1 can also be two parts, the silicon substrate is below the buried layer 4, and the epitaxial layer is above the buried layer 4, which has no influence on the present invention.

[0037] The manufacturing method of the deep isolation layer 2 and the shallow isolation layer 3 is usually as follows: first, an isolation trench is opened on the silicon wafer, and then an insulating material (such as silicon oxide, silicon nitride, silicon oxynitride, etc.) is used as the sidewall protection layer, and then the Trench filling (usually polysilicon or the above insulating materials, air gaps may also be formed by special processes; if air gaps are used, polysilicon or the above insulating mate

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
Parasitic capacitanceaaaaaaaaaa
Login to view more

Abstract

The invention discloses a silicon-germanium HBT (heterojunction bipolar transistor) which comprises a T-shaped emitter, an inner base region and an outer base region, wherein the maximum value of the vertical distance between the upper surface of the T-shaped emitter and the upper surface of the inner base region is a, and the minimum value is b, the difference between a and b is c, and c is less than or equal to 5% of b or is less than or equal to 500; the outer base region comprises a silicon-germanium alloy layer and a polycrystalline silicon layer above the silicon-germanium alloy layer; and the inner base region comprises a silicon-germanium alloy layer. The invention also discloses a manufacturing method of the silicon-germanium HBT. In the silicon-germanium HBT and the manufacturing method thereof, the T-shaped emitter has extremely smooth upper surface; and the emitter can be made of polycrystalline silicon or high k metal materials, and is compatible with the CMOS (complementary metal oxide semiconductor) metal gate process. Besides, the invention reduces the diffusion of outer-base region impurities to the substrate, thereby reducing the parasitic capacitance and being beneficial to improving the overall working frequency of the device.

Description

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products