Spin torque MRAM fabrication using negative tone lithography and ion beam etching
a technology of negative tone lithography and ion beam etching, applied in the field of magnetic random access memory (mram), can solve the problems of large densities, difficult to compete with dram and sram, and difficult to achieve 3 nm, so as to reduce the diameter of the memory stack pillar and reduce the diameter of the pillar
Active Publication Date: 2017-03-02
INT BUSINESS MASCH CORP
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Benefits of technology
This patent describes a method for making a memory device by creating an island of material using a mask and an etch process. A planarizing layer is then etched to create a pillar of material that will serve as a foundation for subsequent layers. A metal layer is etched to create a metal pillar, which is then used to create a memory stack pillar. This method allows for precise placement and control of the memory device, leading to better performance and reliability. The patent also describes a structure of a magnetoresistive memory cell, which includes a magnetic tunnel junction pillar and conductive contacts. Overall, this patent presents a detailed process for creating a memory device with technical effects that improve its performance and reliability.
Problems solved by technology
However, patterning MRAM devices at the small sizes (e.g., 1 Gb / cm2), and high uniformity (e.g., <±3 nm) needed to compete with DRAM and SRAM is difficult.
Two of the most difficult-to-solve problems encountered are poor uniformity across large arrays and low yield of devices smaller than 50 nm.
Existing fabrication techniques produce devices that vary significantly in their size and electrical properties, often producing devices that are non-functional or are outside of design parameters.
As a result, many devices that are formed for memory arrays are not suitable for the task.
However, these methods suffer from a lack of roundness and uniformity in their critical dimensions.
Method used
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Experimental program
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Embodiment Construction
[0020]Embodiments of the present invention provide significant improvements in patterning uniformity and yield compared to conventional magnetoresistive random access memory (MRAM) techniques. The present embodiments employ negative-tone resist developer combined with a positive resist, or positive-tone developer and a negative resist, with a dark-field reticle to form an MRAM device. Devices produced according to the present embodiments provide uniformity as good as, or superior to, processes that are much more costly and complex. Furthermore, the present embodiments employ proven complementary metal oxide semiconductor manufacturing techniques, making them particularly practical.
[0021]Referring now to FIG. 1, a step in fabricating an MRAM cell is shown. A stack of dielectrics and metals is formed, from which an MRAM device will be etched. The stack may be formed by any appropriate deposition process, including for example chemical vapor deposition, atomic layer deposition, and phy...
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A method for forming a memory device includes masking a photoresist material using a reticle and a developer having a polarity opposite that of the photoresist to provide an island of photoresist material. A planarizing layer is etched to establish a pillar of planarizing material defined by the island of photoresist material. A metal layer is etched to form a metal pillar having a diameter about the same as the pillar of planarizing material. A memory stack is etched to form a memory stack pillar having a diameter about the same as the metal pillar. A magnetoresistive memory cell includes a magnetic tunnel junction pillar having a circular cross section. The pillar has a pinned magnetic layer, a tunnel barrier layer, and a free magnetic layer. A first conductive contact is disposed above the magnetic tunnel junction pillar. A second conductive contact is disposed below the magnetic tunnel junction pillar.
Description
BACKGROUND[0001]Technical Field[0002]The present invention relates to magnetoresistive random access memory (MRAM) and, in particular, to improved patterning techniques for the fabrication of MRAM.[0003]Description of the Related Art[0004]Spin-transfer torque magnetoresistive random access memory (STT-MRAM) devices offer many benefits over semiconductor-based memories such as dynamic RAM (DRAM) and static RAM (SRAM). However, patterning MRAM devices at the small sizes (e.g., <50 nm), large densities (>1 Gb / cm2), and high uniformity (e.g., <±3 nm) needed to compete with DRAM and SRAM is difficult. Two of the most difficult-to-solve problems encountered are poor uniformity across large arrays and low yield of devices smaller than 50 nm. Existing fabrication techniques produce devices that vary significantly in their size and electrical properties, often producing devices that are non-functional or are outside of design parameters. As a result, many devices that are formed for...
Claims
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IPC IPC(8): H01L43/12
CPCH01L43/12H01L43/08H01L43/02H01L43/10H10B61/00H10N50/10H10N50/01G11C2211/5615G11C11/161G03F7/70325G03F7/70425H10B61/22H10N50/80H10N50/85
Inventor ANNUNZIATA, ANTHONY J.GALAN, ARMAND A.HOLMES, STEVEJOSEPH, ERIC A.LAUER, GEN P.LIN, QINGHUANGMARCHACK, NATHAN P.
Owner INT BUSINESS MASCH CORP
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