9 results about "Pixel array" patented technology

A solid-state imaging apparatus including: a pixel section having two-dimensionally arrayed unit pixels each having a first pixel and a second pixel respectively containing photoelectric conversion devices that are located at positions regarded as the same position at which image is formed by an imaging optical system; a reset control means for simultaneously resetting respectively independently all first pixels and all second pixels of each unit pixel arrayed in the pixel section; a difference signal output means for obtaining a difference signal between signals of the first pixel and of the second pixel; a control section for rendering control such that a reset is effected of signals of all first pixels of the pixel section and, after a desired exposure time, a reset is effected of signals of all second pixels of the pixel section by the reset control means, and then signals of the first pixel and of the second pixel are read out respectively in a simultaneous or substantially simultaneous manner immediately after the reset of signal of all second pixels by the reset control means so as to output a difference signal between these as imaging signal by the difference signal output means; and a characteristic difference correction means for correcting a characteristic difference between the first pixel and the second pixel.

A display device includes a display panel including a pixel array including data lines, gate lines crossing the data lines, and pixels arranged in a matrix form, a source driver integrated circuit (IC) for supplying a data voltage to the data lines, a gate driver IC for supplying a gate pulse to the gate lines, and a first flexible film cable bonded to a substrate of the display panel. The first flexible film cable includes lines for transmitting gate timing control signals and gate driving powers received from a printed circuit board to the gate driver IC. The first flexible film cable has a thickness of about 20 μm to 100 μm.

A master having a substrate including displaying units and an ESD protection structure including an adjacent first region and a second region is provided. The displaying units have a predetermined-cutting region therebetween. Each displaying unit includes a peripheral circuit region and a display region having pixels. The ESD protection structure disposed on the predetermined-cutting region, located in the peripheral circuit region, and connecting the display region includes a first patterned conductive layer disposed on the first region and having an end away from the predetermined-cutting region, a first patterned dielectric layer disposed on the first patterned conductive layer and the substrate and having a first opening exposing a portion of the first patterned conductive layer, a patterned transparent conductive layer disposed corresponding to the predetermined-cutting region and connecting the first patterned conductive layer, and a second patterned dielectric layer covering the patterned transparent conductive layer and the substrate.

The invention discloses a driving circuit of a silica-based micro displayer. The driving circuit comprises a pixel array circuit composed of pixel circuits distributed in an array, a column driving circuit, a row driving circuit and a control circuit. The pixel circuits are used for storing data signals connected to a circuit column line of a pixel array and generating micro current or micro voltage when selection signals connected to a pixel array circuit row line are valid and accordingly driving micro luminescent devices connected to the pixel circuits. The column driving circuit comprisesa column location selection circuit, a column level switching circuit and a sampling maintenance circuit. The row driving circuit comprises a row location selection circuit and a row column level switching circuit. The control circuit comprises a time schedule controller and a digital-to-analogue converter. According to the driving circuit, by adopting a pixel circuit access mode with multiple voltage domains and higher signal driving capacity, the flexibility and adaptability of the micro displayer are improved, optimal design on the driving circuit is conducted through an extension mode, anda more flexible data shift mode with higher display resolution is supported.

The invention provides an array substrate, a display panel and a manufacturing method of the array substrate. The array substrate comprises a plurality of pixels. Each pixel comprises a thin film transistor, a first conducting layer, a second conducting layer and a third conducting layer. Each second conducting layer is arranged on each thin film transistor; each third conducting layer is arranged on each second conducting layer and is connected with each first conducting layer. A plurality of pixels comprise n pixels arrayed along a first direction; the second conducting layer of the kth pixel in the n pixels is at least partially overlapped with the third conduction layer of the kth pixel so as to form a first capacitor of the kth pixel; the second conducting layer of the (k+1)th pixel in the n pixels is at least partially overlapped with the first conduction layer of the kth pixel so as to form a second capacitor of the kth pixel, wherein k is larger than or equal to 1 and less than or equal to n-1, and n is a positive integer. According to the array substrate, the display panel and the manufacturing method of the array substrate provided by the invention, the size of a pixel capacitor of each pixel can be increased.

The invention discloses a display panel and a pixel array substrate thereof. The pixel array substrate comprises a substrate, a plurality of scanning lines, a plurality of data lines, a plurality of active elements, a plurality of pixel electrodes, at least one common electrode and at least one touch signal line. The scanning lines, the data lines, the touch signal lines and the common electrodesare all arranged on the substrate. The scanning lines, the data lines and the touch signal lines are staggered to define a plurality of sub-pixel areas. The touch signal lines are electrically connected with at least one common electrode. The active elements are electrically connected with the scanning lines and the data lines. The pixel electrodes and the common electrode are arranged in an overlapping mode. Each pixel electrode spans one of the scanning lines and is distributed in two adjacent sub-pixel areas. Each pixel electrode is electrically connected with one of the active elements.