21 results about "Photolithography" patented technology

The invention provides a preparation method of a top gate metal oxide thin film transistor (TFT), belonging to the technical field of semiconductors. The method comprises the following steps: preparing a source/drain electrode; then preparing a metal oxide material; coating a photoresist on the surface of the metal oxide material and carrying out chemical mechanical polishing on the photoresist layer; processing the metal oxide which is not masked by the photoresist by annealing or plasmas; and finally stripping the photoresist and depositing a gate insulation layer material through magnetronsputtering and forming a gate through wet etching. The method has the following beneficial effects: reliable ohmic contact between the metal oxide thin film and the source/drain electrode can be formed by utilizing the characteristic that the metal oxide material can be converted into a conductor from a semiconductor after undergoing special processing.

There is disclosed a liquid crystal display panel that is adaptive for simplifying its process and reducing its cost by performing a patterning process without using a photolithography process, and a fabricating method thereof. A liquid crystal display panel according to an embodiment of the present invention includes a color filter which is formed by a press forming by a soft mold; and a black matrix to divide the color filter by the cell.

The electrode for high-voltage in-situ impedance spectroscopy measurement of the present invention and its preparation method and application belong to the technical field of in-situ measurement of electrical quantities under high-voltage conditions. The electrode consists of an aluminum oxide protective layer (3) deposited on the surface of the diamond anvil (2) and a metal film electrode (1); the metal film electrode (1) is circular in the center of the anvil surface of the diamond anvil (2), Copper wire (5) is bonded to the metal film electrode (1) on the side of the diamond anvil (2); the metal spacer (4) is used as another electrode, forming an axisymmetric electrode together with the metal film electrode (1) system. Electrodes are prepared by magnetron sputtering, molybdenum coating, aluminum oxide deposition, photolithography and chemical corrosion. The invention solves the problems of electrode fixing and sample cavity insulation, and can ignore the influence of the parasitic capacitance and inductance of the system on the measurement results, making it possible to measure the material impedance spectrum in situ with the diamond anvil under high pressure.

One embodiment provides a system for determining a process model for a photolithography process. The photolithography process can use multiple exposure-and-development steps to create features on a wafer. When the photolithography process exposes the wafer to a layout, the wafer can include topography variations which were caused by previous exposure-and-development steps. The process model can be used to predict patterns that are created on the wafer when the wafer is exposed to a second layout, wherein the wafer includes topography variations that were caused by resist features that were created when the wafer was exposed to a first layout. The process model can include a first term and a second term, wherein the first term is convolved with a sum of the first layout and the second layout, and wherein the second term is convolved with the second layout.

An alignment mark is made of at least two nonparallel trenches having two reducing-width-to-zero ends. The displacement bias error, produced by a process bias error, of the centerlines of the trenches is zero where the width of the two trenches is zero. Hence, the alignment target on a substrate can be reproduced.

The invention discloses a novel design method for ESD protection, which comprises the following steps: (1) forming a well region, a gate oxide layer, gate poly-silicon, a porous medium layer, a source electrode and a grid electrode on a silicon substrate of a DMOS device in order; (2) forming the gate poly-silicon under lead bores of the source electrode and the grid electrode; and (3) forming the gate oxide layer between the gate poly-silicon and the well region, wherein the gate oxide layer is used for isolating the source electrode and the grid electrode when the lead bores of the source electrode and the grid electrode are punched at the position of the gate poly-silicon. The novel design method has the remarkable characteristics of utilizing the same set of MASK to produce products with ESD or without ESD by selecting whether to increase a process for photoetching an ESD layer, so as to save MASK cost and greatly save the production cost of the products.

The invention provides a photolithography mask structure. The photolithography mask structure comprises an outer frame area and a pattern area, wherein the outer frame area is arranged at the periphery of the pattern area so as to surround the pattern area; the pattern area is used for arranging an integrated circuit pattern; one or more shifting sheets are arranged at each of the four edges of the outer frame area; each shifting sheet can slide in the extending direction of the edge at which the shifting sheet is arranged of the outer frame area; and each shifting sheet is provided with a plurality of alignment mark patterns in the extending direction of the edge at which the shifting sheet is arranged of the outer frame area. At least one part in the plurality of alignment mark patterns of each shifting sheet has different patterns. The alignment mark patterns required by different photolithographic machines can be switched at same positions on the same photolithography mask by using the novel structure design of alignment marks of the photolithography mask, so that the mark clash problem caused when the photolithographic machines from different manufacturers share the photolithography mask in a matching process is solved.

A method for manufacturing a liquid crystal display which reduces the number of photolithography processes is provided. The method includes the steps of forming a gate electrode and a gate pad by depositing a first metal film and a second metal film on a substrate of a TFT area and a gate-pad connecting area, respectively, in the described order, by a first photolithography process, forming an insulation film on the entire surface of the substrate on which the gate electrode and the gate pad are formed, forming a semiconductor film pattern on the insulating film of the TFT area by a second photolithography process, forming a source electrode/drain electrode and pad electrode composed of a third metal film using a third photolithography process in the TFT portion and pad portion, respectively, forming a passivation film pattern which exposes a portion of the drain electrode, a portion of the gate pad, and a portion of the pad electrode by a fourth photolithography process, exposing the first metal film by etching the second metal film which constitutes the gate pad using the passivation film pattern as a mask, and forming a pixel electrode connected to the drain electrode of the TFT area for connecting the gate pad of the gate-pad connecting area to the pad electrode of the pad area using a fifth photolithography process. Therefore, it is possible to reduce the number of photolithography processes, to improve the manufacturing yield, and to suppress growth of a hillock of an Al film.

The invention provides a storage, a forming method thereof and a semiconductor device. A word line mask which defines a word line conductor is used for forming a first isolation barrier in an autocollimation manner, and a thickening layer is formed so as to increase the thickness of a forming substrate of a second isolation barrier so that the top surface of the second isolation barrier in the forming substrate can be higher than the top surface of the first isolation barrier. Therefore, not only can the crossed first isolation barrier and second isolation barrier be used for defining a node contact window, and accordingly, the problem of displacement deviation caused by the photolithography technique can be eliminated; but also the lower top surface of the first isolation barrier is usedso as to realize extension of the top in contact with the nodes and adjust the arrangement manner of a plurality of nodes on the contact surface of the nodes and a capacitor, and the arrangement density of the capacitor can be further optimized.

A method of fabricating a rigid island pattern on a stretchable layer having a low Young's modulus and a stretchable electronic device platform using the same are disclosed. The stretchable electronic device platform, which is proposed by the present disclosure and has the rigid island pattern on the stretchable layer having a low Young's modulus, includes a stretchable substrate having a first Young's modulus, a Silbione® layer coated with a stretchable layer having a Young's modulus lower than the first Young's modulus on the stretchable substrate, and a fixed layer which is made of a photoresist such as SU-8 or a UV curable resin and has a Young's modulus higher than the first Young's modulus, and in which the rigid island pattern and the meandering stretchable interconnector pattern are formed on the stretchable layer by a photolithography process.

The invention belongs to the technical field of micronano structures and in particular relates to a laser interference photoetching system. After light splitting, a conventional laser interference photoetching system has unequal light intensities, too many light splitting elements, adjustment difficulties and low system reliability. The invention provides the laser interference photoetching systemwhich comprises a double-beam laser generation component, a plurality of light beam shaping components and a plurality of interference components which are arranged in sequence, wherein the double-beam laser generation component comprises a plurality of light beam generation units; polarizers and Q switches are arranged among the light beam generation units; the light beam shaping components comprise beam expansion collimation units and light beam shaping units which are arranged in sequence; and the interference components comprise light splitting units and polarization state adjustment units. After light splitting, the laser interference photoetching system has equal light intensities, concise light splitting elements, adjustment easiness and high system reliability.

An occupancy based pattern generation method for a maskless lithography system using micromirrors is disclosed. The present invention includes the steps of recognizing a pattern upon the substrate through the extraction of the pattern boundary and the construction of the pattern region and recognizing the pattern upon the micromirror through the confirmation of the micromirror dependent lithographic pattern region, the extraction of the micromirror dependent pattern based on the occupancy, and the construction of the stream of binary patterns containing binary reflection information for the micromirrors in accordance with the substrate scrolling.

The invention discloses a side light-emitting deep ultraviolet LED packaging bracket and a production process thereof, the production process includes forming aluminum nitride slurry, injecting it into a base layer mold to form an aluminum nitride base layer; forming a metal layer on the surface of the aluminum nitride base layer; arranging a metal electrode block in a preset electrode region on the metal layer; covering layer of aluminum nitride paste on the metal layer to form an aluminum nitride substrate embryo body; The aluminum nitride substrate embryo is sintered and annealed at high temperature to form an aluminum nitride ceramic structure; The aluminum nitride ceramic structure is laser drilled in each die bonding region on the first surface on the side of the second enclosure damto form a hole from the first surface to the metal layer, and the hole is filled with a metal material; A circuit is formed by photolithography on the first surface according to a preset circuit, anda plurality of independent aluminum nitride ceramic supports are formed after cutting. By the invention, the deep ultraviolet LED lateral light emission can be realized.

A semiconductor component forming method includes providing a semiconductor substrate with the surface provided with a gate electrode structure; forming a mask layer covering the semiconductor substrate and the gate electrode structure; forming a photoresist protection layer on the surface of the mask layer by the deposition process; forming a graphical photoresist layer on the surface of the photoresist protection layer; adopting the graphical photoresist layer as a mask, etching the photoresist protection layer and the mask layer, and forming a graphical photoresist protection layer and a graphical mask layer; adopting the graphical photoresist protection layer and the graphical mask layer as masks, etching a certain thickness of the semiconductor substrate adjacent to the gate electrode structure, and forming grooves; removing the graphical photoresist layer; removing the graphical photoresist protection layer; forming stress layers fulfilling the grooves by epitaxy technique. The selectivity of the epitaxy technique is improved, the growth of stress layer material on an unexpected region is avoided, and the electrical properties of the semiconductor component are improved.

A method of manufacturing a semiconductor device includes configuring a layout pattern; and forming conductive lines corresponding to the layout pattern on a substrate, wherein configuring the layout pattern includes: arranging pre-conductive patterns and post-conductive patterns for a first logic cell, a second logic cell, and a third logic cell; rearranging the pre-conductive patterns and the post-conductive patterns so that two conductive patterns that are adjacent to a boundary between two adjacent logic cells from among the first logic cell, the second logic cell, and the third logic cell are formed by different photolithography processes; and arranging conductive patterns for a dummy cell arranged between the second logic cell and the third logic cell.

The invention provides a humidity control device, a temperature control system of the humidity control device and a photolithography cabinet. Relative humidity of air provided by air conditioner equipment can be adjusted, normal work of production equipment is ensured, and the product yield is increased. The humidity control device comprises a control unit, a steam generation unit, a steam distribution unit and a monitoring unit. The monitoring unit is used for sending the humidity of air provided by the air conditioner equipment and provides the sensed humidity information of air for the control unit. The control unit is used for controlling the output state of the steam generation unit according to the received air humidity information, and therefore the steam amount of the water steam provided by the steam generation unit for the steam distribution unit is controlled. The steam distribution unit is used for providing the received water steam for the air conditioner equipment so thatthe water steam and air provided by the air conditioner equipment can be mixed.

The invention relates to the field of method of etching a substrate (W), in particular a wafer, in order to produce a grid of micro-protrusion. Such grid of micro-protrusion is generally made using UV photolithography followed by wet and chemical engraving with an etching solution. Most of the currently available methods do not lead to an even attack of the wafer surface by the etching solution because the reaction produces a release of micro-bubbles which, if not properly evacuated, disturb the etching process. In the present invention, substrate(s) (W) are disposed on a magnetic supporting device (1) which is driven in rotation in the etching solution via a magnetic agitator external to the etching solution, so that the magnetic supporting device (1) causes the substrate to rotate at least in a same direction the magnetic supporting device (1). The present invention makes it possible to obtain substrates with good homogeneity.

The invention relates to a photoetching system and a photoetching method thereof. The system comprises: at least two production lines, each production line comprises a plurality of process units configured to perform photoetching of a wafer; a detection unit configured to detect the working states of the process unit in the production lines; a control unit connected with the detection unit and configured to receive signals of the working states sent by the detection unit and generate control signals according to the working states of the process units in the production lines; and a dispatchingunit configured to transmit the wafer from the production line to the other adjacent production line according to the control signals of the control unit. The method comprises the steps of: receivingthe working states of the process units in the production lines from the detection unit; determining whether the working states of the process units in the production lines generate faults or not; and when the working states of the process units in the production lines generate faults, generating first control signals by the control unit to allow the dispatching unit to transmit the wafer from the production line to the other adjacent production line. The photoetching system is flexible in work and can meet the batch production of wafers.